Original 14 Emmy! Intel has set a goal to become the second largest wafer foundry by 2030

As early as 2021, Pat Gelsinger, who had recently taken over as CEO of Intel, proposed the strategy of IDM 2.0 and threw out the big goal of crossing five process nodes within four years. Due to the painful experience of multiple 10nm delays, many people subconsciously believe that such a goal seems unreliable.


However, after Intel frequently made business adjustments, increased the construction of wafer fabs with the support of local governments, and successfully launched products for the two key nodes of Intel 7 and Intel 4, it seems that the four-year plan for five process nodes is progressing smoothly and steadily.


At the recent IFS Direct Connect conference, Intel officially renamed its wafer foundry business as Intel Foundry and referred to it as the first system wafer foundry designed for the AI era. Intel has also announced that it will continue to add more process nodes before 2027, while setting a goal to become the world's second wafer foundry by 2030.


14A: First high NA EUV lithography machine node


With the widespread use of EUV lithography machines, Intel has entered a rhythm of comprehensively advancing advanced technology nodes. Even the recently launched Intel 7 has been listed as a mature technology node by Intel this time. At advanced process nodes, Intel has already planned the subsequent roadmaps for Intel 3, Intel 18A, and 14A.



Intel Foundry Process Roadmap/Intel


In the Intel 3 process, which is starting to use EUV machines on a large scale, Intel will launch the first Intel 3-T node using TSV/Foveros Direct in 2025, as well as feature enhanced Intel 3-E nodes (supporting high voltage, etc.). Finally, based on the design of Intel 3-T, Intel will launch the first high-performance node among the new nodes, Intel 3P-T. Compared to the regular Intel 3-T, the performance of Intel 3P-T should be enhanced by 5% to 10%.


On the Intel 18A, as previously announced, although the main components of the first high NA EUV lithography machine have been delivered to Intel's wafer factory, the 18A will not be the first process to use this expensive equipment. At the same time, Intel will also launch the high-performance node of Intel 18A, Intel 18A-P, in 2025.


After all, Intel emphasizes that 18A will become their next-generation longevity technology, and it is expected to launch high-performance nodes. It is estimated that many server chips will be built based on this node in the future, such as the next-generation Xeon CPU Clearwater Forest that has been successfully taped, and the Panther Lake processor that focuses on AI performance.


Intel stated that they will use all their latest technologies on the Intel 18A, including PowerVia, RibbonFET, EMIB, and Foveros Direct. However, Intel has not publicly released the TSV version of Intel 18A this time, and perhaps the related 3D stacking technology is still being studied at advanced technology nodes.


Finally, Intel's killer move to regain its leading position in semiconductor manufacturing is the Intel 14A. Intel will use high NA EUV lithography machines for the first time in the Intel 14A process and will begin risk trial production at the end of 2026. In addition, Intel will also provide feature enhanced Intel 14A-E nodes, which will begin risk trial production in 2027.


As the first process to use high NA EUV lithography machines, undoubtedly 14A is Intel's ace in trying to regain its leading position in semiconductor manufacturing. The process will be developed in Oregon, and the first batch of chips will also be put into production here. However, Intel has not publicly disclosed any technical information used by Intel 14A, such as whether it will use the iterated versions of RibbonFET and PowerVia.


Gaota and Liandian, two major collaborative process nodes


Although Intel's plan to acquire Gaota Semiconductor has failed, the cooperation between the two has not been terminated as a result. On September 5th last year, Intel announced a partnership with Tower Semiconductor to provide semiconductor foundry services and manufacturing capacity of 300mm wafers to help Tower Semiconductor serve global customers. This will enable Tower Semiconductor to use Intel's fab11X wafer factory equipment in New Mexico, USA.


This cooperation is not solely invested by Intel, and Gaota Semiconductor will also invest $300 million in the equipment and fixed assets of the factory, providing Gaota Semiconductor with a monthly production capacity of over 600000 exposure layers in the future, helping it meet the needs of simulation processing related customers. However, the investment this time is not for advanced technology nodes, but for mature 65nm processes, mainly used to create differentiated power management chips and RF SOI solutions for high tower semiconductors. It is reported that this node is expected to undergo comprehensive process validation this year.


On January 25th of this year, Unilever and Intel jointly announced that they will collaborate to develop a 12nm process platform to address high growth markets such as mobile, communication infrastructure, and networks. This new process node will be developed and manufactured at Intel's three wafer fabs in Arizona, with mass production expected to begin in 2027. Considering that this node is independent of other mature nodes provided by Intel, it appears that Intel does not intend to make a profit on this node, but instead chooses to collaborate with Liandian to build a new process node using existing DUV devices.


TSMC's major customers have become platform players for Intel's OEM manufacturing


At this conference, Intel invited many industry experts as its platform, including OpenAI CEO Sam Altman, Microsoft CEO Satya Nadella, as well as executives from MediaTek, Arm, Broadcom, as well as the four EDA giants of Xinsi, Cadence, Siemens, and Ansys.


Microsoft and MediaTek have both confirmed their contract manufacturing cooperation with Intel, while Arm and a group of EDA manufacturers have already provided EDA/IP support for them. From this perspective, Intel is determined to surpass TSMC in order to continue exploring TSMC's major customers, even AMD and Nvidia, which are within Intel's potential cooperation scope.


In terms of OEM processes provided to customers, Intel focuses on three advanced processes: Intel 3, Intel 18A, and Intel 14A, as well as the mature process of Intel 16. Another noteworthy point is the advanced packaging capabilities provided by Intel. In the current situation where advanced packaging capacity is lacking, even if manufacturers are unwilling to temporarily replace wafer factories, it is still feasible to entrust TSMC to produce chips and then give Intel the opportunity to complete the packaging.


According to Taiwanese media reports, due to insufficient advanced packaging capacity of TSMC's CoWoS, Nvidia has listed Intel as an alternative advanced packaging solution supplier and will start production in the second quarter at the earliest, with a monthly production capacity of up to 5000 pieces. However, the advanced packaging capacity that TSMC can provide has greatly improved. The monthly production capacity in the first quarter of this year is expected to reach 50000 pieces, so the main contributor is still TSMC. However, the emergence of Intel undoubtedly alleviates the supply of AI chips, and even with both sides simultaneously ramping up production capacity, it may further break the supply deadlock.


Write at the end


Intel CEO Pat Gelsinger seems confident in Intel Foundry's team, and at least based on the current situation, the production and manufacturing plans are in line with expectations. But from a technical and commercial perspective, this is far from representing the outcome. Firstly, for chip designers, they are more cautious when evaluating the process, especially when comparing PPA, yield, and production capacity between different wafer foundries. In business, Intel also needs to gain a certain degree of trust and achieve a significant success in a product from a major customer, in order to potentially attract more customers.


 

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